Electronic and electromechanical components are presently fabricated in large, immobile manufacturing facilities that are tremendously expensive to build and operate. For example, semiconductor device fabrication generally requires specialized microlithography and chemical etching equipment, as well as extensive measures to avoid process contamination.
The large up-front investment required for manufacturing capacity not only limits its general availability, but also increases the cost of custom fabrication. For a small custom order to be financially competitive with mass production of an established device, the per-unit cost will necessarily be quite high--often out of reach for many designers. Currently, the economics of device fabrication disfavors sophistication and small batch sizes.
In addition to their expense, the fabrication processes ordinarily employed to create electronic and electromechanical components involve harsh conditions such as high temperatures and/or caustic chemicals, limiting the ability to integrate their manufacture with that of functionally related but environmentally sensitive elements. For example, the high temperatures used in silicon processing may prevent three-dimensional fabrication and large-area fabrication; these temperatures are also incompatible with heat-sensitive materials such as organic and biological molecules. High temperatures also preclude fabrication on substrates such as conventional flexible plastics, which offer widespread availability and low cost.
These fabrication processes are also subtractive, depositing a desired material over an entire substrate before removing it from undesired locations through techniques such as etching and lift-off. Subtractive processes are wasteful; introduce dangerous, costly, and environmentally unfriendly chemicals to the fabrication process; and limit the range of manufacturable devices since the etch chemistry can interact with previously deposited layers.
Approaches toward reducing the cost of custom manufacture are described in copending application Ser. No. 08/958,098 and published PCT Application WO 98/03896. In accordance with these publications, semiconductor devices are fabricated by successive deposition of electrically active layers in a manner analogous to conventional printing. The described processes facilitate manufacture outside of vacuum, in an artibrary pattern and on a wide range of substrates, without the need for specialized techniques such as chemical etching. They are also additive, confining material deposition to appropriate areas.
These processes, while highly advantageous in some applications, are nonetheless limited in terms of the properties achievable by the resulting devices. In particular, devices based on electrically active particles dispersed in an inert binder tend to be limited in terms of clock speed owing to the permanent spacing between particles. While it is possible to increase clock speed by fusing the particles into a continuous layer, this requires high-temperature processing which is costly and, as noted above, may damage the substrate or other electrically active layers.